Manolis G.H. Katevenis very short biography (2012):

Manolis Katevenis received the Ph.D. degree from U.C.Berkeley in 1983
and the ACM Doctoral Dissertation Award in 1984 for his thesis on
"Reduced Instruction Set Computer Architectures for VLSI".  After a
brief term on the faculty of Computer Science at Stanford University,
he is in Greece, with the University of Crete and with FORTH, since 1986.
After RISC, his research has been on interconnection networks and
interprocessor communication.  In packet switch architectures, his
contributions since 1987 have been mostly in per-flow queueing,
credit-based flow control, congestion management, weighted round-robin
scheduling, buffered crossbars, non-blocking switching fabrics, and
high-radix on-chip crossbars.  In parallel and cluster computing,
his contributions since 1993 have been on remote-write-based, protected,
user-level communication; in unifying explicit and implicit communication
by integrating the network interface with the cache controller; and
in cache-optimized RDMA.  Katevenis is a Member of the Academy of Europe,
a founding partner and a member of the Steering Committee of HiPEAC,
and a co-founder of EuReCCA - the European Research Center on
Computer Architecture.  His home URL is http://www.ics.forth.gr/~kateveni