Nikolaos Chrysos
Collaborating Researcher at ICS-FORTH
Computer Architecture and VLSI Systems (CARV) Laboratory
Visiting Instructor
Computer Science Department of University of Crete

Email: nchrysos at ics dot forth dot gr
Telephone: +30 2811 391406
Postal address: FORTH-ICS, 100 Plastira, Vassilika Vouton, Heraklion, Crete, GR-70013, Greece.

Short biography
Nikolaos Chrysos received his PhD in Computer Science from the University of Crete in 2006. In his PhD thesis, he conducted pioneering work on congestion management that was supported by an IBM PhD Fellowship, where he proposed architectures that were adopted by several commercial switches in the following years. From May 2009 to September 2014, he was with IBM Research in Zurich, where he worked with IBM Systems & Technology Group (STG) on the Implementation and Performance Optimization of Next- generation Networks for PureFlex Systems. Since October 2014, he is with ICS-FORTH as a Postdoctoral Fellow, and he is also a Visiting Instructor at the Computer Science Department of University of Crete. Under the ExaNeSt, EuroEXA (H2020 FET-HPC) projects, he led the Network Interface Group that designed and built RDMA-capable network interfaces with congestion management capabilities. He is currently principal investigator in the RED-SEA EuroHPC project. He has served in the Technical Program Committee of 15 conferences and workshops. He is the author or the co-author of 16 patent applications (14 Granted). According to Google Scholar, he has an h-index of 15 and his publications have received more than 891 citations.

Research interests

  • interconnection networks & switching fabrics
  • computer/server architecture, datacenters, high-performance computers
  • microservers
  • congestion control and routing
  • IO network stack
  • high-radix switches
  • virtualization
  • on-chip networks

    Awards/Grants

  • IBM PhD Fellowship in 2004-2005 and 2005-2006 external link
  • Four IBM Patent plateau awards -- A plateau is awarded for filing four (4) patent applications
  • High value patent applicaton (IBM)
  • HiPEAC Paper Award, 2015

    Current Projects

  • Network Solution For Exascale Architectures (EuroHPC) RED-SEA will build upon the European interconnect BXI (BullSequana eXascale Interconnect), together with standard and mature technology (Ethernet) and previous EU-funded initiatives (aka ExaNeSt and EuroEXA) to provide a competitive and efficient network solution for the exascale era and beyond.
  • European Exascale Processor-Memory Node Design (FETHPC-1-2014) ExaNoDe will investigate, develop and pilot (technology readiness level 7) a highly efficient, highly integrated, multi-way, high-performance, heterogeneous compute element aimed towards exascale computing and demonstrated using hardware-emulated interconnect. It will build on multiple European initiatives for scalable computing, utilizing low-power processors and advanced nanotechnologies.
  • European Exascale Interconnects and Storage (FETHPC-1-2014) logo ExaNeSt will develop, evaluate, and prototype the physical platform and architectural solution for a unified Communication and Storage Interconnect and the physical rack and environmental structures required to deliver European Exascale Systems. The consortium brings technology, skills, and knowledge across the entire value chain from computing IP to packaging and system deployment; and from operating systems, storage, and communication to HPC with big data management, algorithms, applications.

    Past Projects

  • Server-rack fabrics running at 100G
  • Clos on-chip networks & multi-terabit switching chips
  • Heterogeneous InP on Silicon Technology for Optical Routing and LogIC (HISTORIC)
  • Switching fabrics with small internal buffers for scalable non-blocking interconnects
  • Buffered crossbar switches

    Teaching

  • Packet Switch Architecture, 2015-2022, Computer Science Department, University of Crete
  • Logic design, Autumn 2008, 2009, ECE Department, Technical University of Crete
  • Recent publications

    E. Mageiropoulos, N. Chrysos, N. Dimou and M. Katevenis, "Using hls4ml to Map Convolutional Neural Networks on Interconnected FPGA Devices", in IEEE Annual International Symposium on Field- Programmable Custom Computing Machines (FCCM), Orlando, FL, USA, 2021 pp. 277-277 (short paper)
    M. Ploumidis, et al.: "Software and Hardware co-design for low-power HPC platforms", in International Conference on High Performance Computing, June 2020
    A. Psistakis, et al., "PART: Pinning Avoidance in RDMA Technologies", in 14th IEEE/ACM International Symposium on Networks-on-Chip (NOCS), Sept. 2020
    M. Pavlidakis, S. Mavridis, N. Chrysos, A. Bilas: "TReM: A Task Revocation Mechanism for GPUs", IEEE Int. Conference on High Performance Computing and Communications (HPCC), Dec. 2020
    D. Giannopoulos, N. Chrysos, E. Mageiropoulos, G. Vardas, L. Tzanakis, M. Katevenis: "Accurate Congestion Control for RDMA Transfers", 12th IEEE/ACM International Symposium on Networks-on- Chip (NOCS 2018) Oct. 2018
    E. Kanellou, N. Chrysos, S. Mavridis, Y. Sfakianakis, A. Bilas: "GPU Provisioning: The 80 - 20 Rule", Proceedings of the 24th International European Conference on Parallel and Distributed Computing (EuroPar 2018), Turin, Italy, 27-31 August, 2018
    M. Katevenis, N. Chrysos, M. Marazakis et al. "The ExaNeSt Project: Interconnects, Storage, and Packaging for Exascale System", to appear in Proceedings of Euromicro Conference on Digital System Design (DSD), Aug. 31 - Sept. 2, Limassol, Cyprus paper
    A. Psathakis, V. Papaefstathiou, N. Chrysos, F. Chaix, V. Vassilakis, D. Pnevmatikatos, M. Katevenis"A Systematic Evaluation of Emerging Mesh-like CMP NoCs", IEEE/ACM Symposium on Architectures for Networking and Communications Systems (ANCS), CA, May 2015
    N. Chrysos, F. Neeser, M. Gusat, C. Minkenberg, W. Denzel, C. Basso, M. Rudquist, K. Valk, B. Vanderpool "Large Switches or Blocking Multi-Stage Networks? An Evaluation of Routing Strategies for Datacenter Fabrics", Computer Networks, Elsevier, to appear
    N. Chrysos, F. Neeser, R. Clauberg, D. Crisan, K. Valk, C. Basso, C. Minkenberg, M. Gusat, "Unbiased QCN for Scalable Server-Rack Fabrics", IEEE Micro, to appear paper
    N. Chrysos, C. Minkenberg, M. Rudquist, C. Basso, B Vanderpool, "SCOC: High-Radix Crossbars Made Of Bufferless Clos Networks", IEEE Symposium on High Performance Computer Architecture (HPCA), CA, Feb. 2015 paper
    N. Chrysos, F. Neeser, B. Vanderpool, M. Rudquist, K. Valk, T. Greenfield, C. Basso, "Integration and QoS of Multicast Traffic in a Server-Rack Fabric with 640 100G Ports", IEEE/ACM Symposium on Architectures for Networking and Communications Systems (ANCS), Los Angeles, Oct. 2014 paper
    D. Crisan, R. Birke, N. Chrysos, C. Minkenberg, M. Gusat, "zFabric: How to Virtualize Lossless Ethernet", IEEE International Conference on Cluster Computing (CLUSTER), Madrid, Spain, Sept. 2014

    More

  • Publications
  • Patents
  • Invited talks
  • Professional activities