CS-534: Packet Switch Architecture

Course Content and Logistics

Lecture Transparencies:

• 0. Course Overview
• 1. Links (point-to-point, serial/parallel), Circuit Switching
• 2. Basic Switching Notions, Switch Generations
• 3. Buffer Memory Technologies and Architectures
• 4. Switch Queueing Architectures & Performance
• 5. Switching Fabric Topologies
• 6. Routing Table Lookup and Flow Classification Hardware: See Reading List [8]-[10]
• 7. Output Scheduling for QoS (you may wish to read it after section 8)
• 8. Flow Control, Switching Fabrics with Internal Backpressure

Exercises:

• Exercise set 1: (due week 2 --17 Feb. 2000) Rate and throughput calculations.
• Exercise set 2: (due week 3 --24 Feb. 2000) TST circuit switch scheduling.
• Exercise set 3: (due week 4 --02 March 2000) Internal blocking, cut-through.
• Exercise set 4: (extension to week 6 --14 March) Switch generations, elastic buffers.
• Exercise set 5: (extension to week 7 --21 March) Multi-queue memories using linked lists.
• Midterm Exam: Thursday 23 March (week 7).
• Exercise set 6: (due week 9 --04 April 2000) Queueing Architectures and their Cost.
• Exercise set 7: (due week 10 --20 April 2000) Queueing Architecture Performance.
• Exercise set 8: (due week 11 --09 May 2000) Switching Fabric Topologies.
• Exercise set 9: (due week 12 --18 May 2000) Flow Control.
• Exercise set 10: to be assigned.

Old Exercises (Spring 1998):

• Exercise 2: Introduction to CSIM (due 10 March 1998). The User Guide of CSIM is here.
• Exercise 3: Simulation of Input and Output Queueing using CSIM (due 31 March 1998).
• --------Other exercises were a subset of this year's exercises.

Old Projects (Spring 1998):

• Wormhole IP over (Connectionless) ATM
  • Reading List: see course (old) section 4
  • Project Topics
  • IP Traffic Trace Sources
• Software Implementation for QFC (Quantum Flow Control)
• Sceduling Algorithms for Input-Buffered Switches: simulation using CSIM.