University of Crete
Department of Computer Science

CS-422: Introduction to VLSI Systems

Fall 2002
Christos Sotiriou and Manolis Katevenis

Course Content: to be added soon.

Lecture Notes:

Logical Effort (in Greek, PDF, 1.62 MBytes).
MOS Transistor Theory (in Greek, PDF, 1.60 MBytes).

Exercises:

Exercise 1 (due week 3 --08 Oct. 2002): NAND & NOR layout using "Magic".
Exercise 2 (due week 4 --22 Oct. 2002): Full-adder sticks-level design.
Exercise 3 (due week 5 --29 Oct. 2002): 8-bit semi-static latch design and layout.
Exercise 4 (due week 6 --07 Nov. 2002): Floorplanning.
Midterm Exam: 12 November 2002 (week 7).
Exercise 5 (due week 8 --22 Nov. 2002): Timing.
Exercise 6 (due week 10 --3 Dec. 2002): Driver layout & delay.
Exercise 7 (due week 11 --12 Dec. 2002): Power consumption.
Exercise 8 (due week 13 --9 Jan. 2003): Tri-State Bus Delay.
Exercise 9 (due week 13 --14 Jan. 2003): Precharged Bus Delay.

Bibliography:

For those who want to read more in depth about the topics of this course, we suggest that they study the following sections from the book of the course (Weste & Eshraghian, Greek Translation of the 2nd Edition):

1.3 through 1.5;
2.1 through 2.2.1 (and skim through (ξεφυλλίστε): 2.3-2.7);
3.4 (and skim through 3.1-3.3 and 3.5);
4.1 - 4.3.3, 4.6 - 4.13, (and skim through 4.3.5-4.3.8, 4.5.2-4.5.5);
5.3, 5.7, most of 5.4 and 5.5, (and skim through 5.2, 5.6);
most of 8.3 and 8.4 (and skim through 8.2).