CS-534: Packet Switch Architecture
Spring 2003
Department of Computer Science
© University of Crete, Greece

4.3   The Input Queueing Family

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Input Queueing Family

Input Queueing is NOT the Dual of Output Queueing

Throughput and Delay under Input Queueing with Head-of-Line (HOL) Blocking:

When the incoming traffic consists of fixed-size packets from independent, identically distributed (i.i.d.) Bernoulli processes, with uniformly-distributed destination (output) ports, analysis and simulation have yielded the results plotted below. Sources (© copyright IEEE):
  • M. Hluchyj, M. Karol: "Queueing in High-Performance Packet Switching", IEEE Journal on Sel. Areas in Commun. (JSAC), vol. 6, no. 9, Dec. 1988, pp. 1587-1597.
  • M. Karol, M. Hluchyj, S. Morgan: "Input versus Output Queueing on a Space-Division Packet Switch", IEEE Trans. on Communications, vol. 35, no. 12, Dec. 1987, pp. 1347-1356.
  • J. Hui, E. Arthurs: "A Broadband Packet Switch for Integrated Transport", IEEE Journal on Sel. Areas in Commun. (JSAC), vol. 5, no. 8, Oct. 1987, pp. 1264-1273.
    Attention: results derived for i.i.d. Bernoulli (non-bursty) arrivals, with uniformly-distributed destinations (no overloaded hot-spots), are only useful for gaining a rough, first insight into the behavior of systems, but are often not representative of the real behavior of systems under real traffic!...

    Input queueing saturation throughput

    Input queueing delay Output queueing delay

    Delay comparison for output versus input queueing

    © copyright IEEE

    Appendices for optional study:
    Performance analysis transparencies by prof. George Stamoulis, CS-534, Spring 2000 semester:

  • Spring 2000 sec. 4.6: Input Queueing Throughput Analysis
  • Spring 2000 sec. 4.7: Input Queueing Delay Analysis and Variants
  • Spring 2000 sec. 4.8: Output Queueing Performance Analysis

    Advanced Input Queueing (Buffering) - Virtual Output Queues

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