Manolis G.H. Katevenis
Professor,
Department of Computer Science,
University of Crete;
Head,
Computer Architecture and VLSI Systems (CARV) Laboratory, and
Deputy Director,
Institute of Computer Science (ICS),
Foundation for Research & Technology - Hellas (FORTH),
Heraklion,
Crete,
Greece.
Home Page:
http://users.ics.forth.gr/~kateveni/
E-mail:
kateveni papaki ics teleia forth teleia gr
Tel:
+30 - 2811.39.16.64 (ICS office),
+30 - 2810.39.35.64 (CSD office),
Fax: +30 - 2811.39.16.61
Address (Postal and Courier):
FORTH-ICS, 100 Plastira Ave, Vassilika Vouton, Heraklion, Crete,
GR-70013 GREECE.
UoC-CSD Visiting Address and Office Hours:
Room K329, Computer Science Building;
Mondays and Wednesdays 12:10 - 13:15
(preferably, call or email before coming, for confirmation and appointment).
FORTH-ICS Visiting Address: Room C-149, Central Building (A),
ICS, FORTH Campus
(more
local and travel info, from HiPEAC'11).
Areas of Interest:
- Computer Architecture:
Scalable, Low-Power, Manycore / Multiprocessor / Warehouse-Scale
System Architecture for High Performance Computing (HPC) and Big Data;
Exascale Computing; RISC-V;
- Interprocessor Communication, Memory and Protection Architecture;
- Interconnection Network Architecture;
- VLSI Systems.
Member of
Academia Europaea -
The Academy of Europe
(see also www.AE-Info.org
for more information of general interest)
Member of the Steering Committee of the
European Network of Excellence (NoE) on
High-Perfomance and Embedded Architecture and Compilation (HiPEAC)
Co-founder of the
European Research Center on Computer Architecture (EuReCCA)
– now evolved into
EuroLab-4-HPC
Stelios Pichoridis Award
for Outstanding Univesity Teaching
– jointly with Charalampos Katerinopoulos –
University of Crete, 2015:
Lecture Slides [PDF]
[and a TV conference at TV Creta]
Award by the Secretary General of the Region of Crete, 2003
– jointly with Stelios Orphanoudakis
and Panos Constantopoulos –
as the Principal Organizers of the Department of Computer Science,
University of Crete.
ACM Doctoral Dissertation Award 1984
"For his dissertation
Reduced Instruction Set Computer Architectures for VLSI."
In 2015, the RISC Project was recognized as an IEEE Milestone.
Detailed Curriculum Vitae (HTML version of Dec. 2018)
[or PDF version];
includes
Biography
and full lists of:
publications,
grants,
conference organization,
invited lectures,
students, and
courses
Brief Biography (2013)
(or Greek version (2013))
(or very short version (2012)).
Older (March 2011) list of
Publications by topic,
with pointers to the corresponding project pages.
Research Projects:
Teaching:
-
CS-120: Digital Design
(Fall semesters - F'15 and older, since 2002).
[Private local]
-
CS-225: Computer Organization
(Sp'15, Sp'14, and many spring semesters since the late 80's).
[Private local]
-
CS-534: Packet Switch Architecture
(graduate course - Sp'15 with N. Chrysos;
Sp'13, and most spring semesters since the mid-90's)
[obsolete 2nd copy].
-
CS-121: Electric Circuits
(Sp'12, Sp'11, Sp'10)
[2nd copy].
-
CS-425: Computer Architecture
(F'06; F'04; F'03; F'00; F'99, F'96, and older).
-
CS-422: Introduction to VLSI Systems
(F'02, F'00, F'99, Sp'98, and older).
Others:
© Copyright 1998-2016 Manolis Katevenis.
Last updated: Feb. 2016 (partial update in 2018).