Manolis G.H. Katevenis
Department of Computer Science,
University of Crete;
Founder & ex-Head,
Computer Architecture and VLSI Systems (CARV) Laboratory,
Institute of Computer Science (ICS),
Foundation for Research & Technology - Hellas (FORTH),
kateveni papaki ics teleia forth teleia gr
+30 - 28184.108.40.206 (ICS office),
+30 - 2810.39.35.64 (CSD office)
Address (Postal and Courier):
FORTH-ICS, 100 Plastira Ave, Vassilika Vouton, Heraklion, Crete,
UoC-CSD Visiting Address and Office Hours:
Room K329, Computer Science Building;
usually Mondays and Fridays 11:00 - 11:30
(please call or email before coming, for confirmation and appointment).
FORTH-ICS Visiting Address: Room AA282, East Campus,
(more local and travel info, from HiPEAC'11).
Areas of Interest:
– Computer Architecture:
Scalable Manycore / Multiprocessor / Warehouse-Scale
System Architecture for High Performance Computing (HPC) and Big Data;
Exascale Computing; RISC-V;
– Interprocessor Communication:
Memory-to-memory communication and synchronization
– remote-DMA, remote-enqueue;
Lean, low-latency Network Interfaces;
– Interconnection Network Architecture;
– VLSI Systems.
Founding member of the European Network of Excellence (NoE) on
High-Perfomance and Embedded Architecture and Compilation (HiPEAC)
– The Academy of Europe (see also
for more information of general interest)
Stelios Pichoridis Award
for Outstanding University Teaching
– jointly with Charalampos Katerinopoulos –
University of Crete, 2015:
[and a TV conference at TV Creta]
Award by the Secretary General of the Region of Crete, 2003
– jointly with Stelios Orphanoudakis
and Panos Constantopoulos –
as the Principal Organizers of the Department of Computer Science,
University of Crete.
ACM Doctoral Dissertation Award 1984
"For his dissertation
Reduced Instruction Set Computer (RISC) Architectures for VLSI."
Full text of the Dissertation
In 2015, the RISC Project was recognized as an IEEE Milestone.
free and open standard Instruction Set Architecture
is an evolution of that project.
Detailed Curriculum Vitae (HTML version of July 2021)
[or PDF version];
and full lists of:
Brief Biography (2013)
(or Greek version (2013))
(or very short version (2012)).
Older (March 2011) list of
Publications by topic,
with pointers to the corresponding project pages.
Interconnection Network Architectures: currently in the
Other current Computer Architecture & VLSI projects
in the CARV Laboratory:
Recent projects in Exascale System Architecture:
Previous projects, 1992-2013:
CS-120: Digital Design
(Fall semesters since 2002).
CS-225: Computer Organization
(Spring semesters since 2014,
as well as many spring semesters since the late 80's).
CS-534: Packet Switch Architecture
(graduate course - Sp'15 with N. Chrysos;
Sp'13, and most spring semesters before that since the mid-90's)
[obsolete 2nd copy].
CS-121: Electric Circuits
(Sp'12, Sp'11, Sp'10)
CS-425: Computer Architecture
(F'06; F'04; F'03; F'00; F'99, F'96, and older).
CS-422: Introduction to VLSI Systems
(F'02, F'00, F'99, Sp'98, and older).
© Copyright 1998-2023 Manolis Katevenis.
Last updated: July 2023.